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Faculty Arshad Aziz

ARSHAD AZIZ

Professor
  • Pakistan Navy Engineering College
  • 02148503064
  • arshad@pnec.nust.edu.pk
  • Doctoral
Summary

Academic Background
PhD (Electrical Engineering) (INFORMATION SECURITY AND FPGA DESIGN) Doctoral National University of Sciences and Technology June 04, 2002 - November 30, 2007
MS (Computer Engineering) (COMPUTER NETWORKING) Masters Sir Syed University of Engineering and Technology March 14, 2000 - March 11, 2002
BS (Computer Engineering) (COMPUTER ENGINEERING) Bachelor Sir Syed University of Engineering and Technology March 28, 1994 - March 28, 1998
Honours and Awards
Research and Teaching Professor National University of Sciences and Technology February 19, 2021 - May 18, 2022.
Research and Teeaching Associate Professor National University of Sciences ans Technology January 22, 2011 - February 18, 2021.
Publications
Resource-Efficient Image Buffer Architecture for Neighborhood Processor October 15, 2020 Arshad Aziz, Majida Kazmi, Hashim Raza Khan, Saad Ahmed Kazi, Lampros Stergioulsa IEEE Access - Volume 8, Pages 181964-181975
Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3 May 22, 2020 Arshad Aziz, Dur-e-Shahwar Kunidi, Ayesha Khalid, Chenghua Wang, Máire O'Neill , Weiqiang Liu IEEE Transactions on Circuits and Systems I: Regular Papers (Early Access) - Vol 1, No.1 pp-1-14
A Pareto-Optimal Multi-filter Architecture on FPGA for Image Processing Applications October 01, 2019 Majida Kazmi, Arshad Aziz, Dur e Shahwar Circuits Systems and Signal Processing - Volume 38, Issue 10, Pages 4762-4786
A new rectangular window based image cropping method for generalization of brain neoplasm classification systems September 01, 2018 RAZIA ZIA, PERVEZ AKHTAR, ARSHAD AZIZ International Journal of Imaging Systems and Technology -
Multi-Resolution Transforms Based Hybrid Feature Extraction Technique for Differentiating Glioma Grades. July 20, 2018 RAZIA ZIA, PERVEZ AKHTAR, ARSHAD AZIZ, DUR E SHAHWAR KUNDI International Journal of Wavelets, Multiresolution and Information Processing -
An efficient and compact row buffer architecture on FPGA for real-time neighbourhood image processing April 24, 2017 Majida Kazmi, Arshad Aziz, Pervez Akhtar Journal of Real-Time Image Processing -
A Low Cost Structurally Optimized Design for Diverse Filter Types November 10, 2016 Majida Kazmi, Arshad Aziz, Pervez Akhter, Nassar Ikram PLoS ONE - Volume 11, Issue 11, Article number e0166056
A low-power SHA-3 designs using embedded digital signal processing slice on FPGA October 01, 2016 Dur e Shahwar, Arshad Aziz Computers & Electrical Engineering - Volume 55, Pages 138-152
A high performance ST-Box based unified AES encryption/decryption architecture on FPGA March 01, 2016 Dur e Shahwar, Arshad Aziz, Nassar Ikram Microprocessors and Microsystems - Volume 41, Pages 37-46
A FPGA based Reconfigurable 2D Filter Architecture for Biomedical Image Preprocessing February 01, 2016 Arshad Aziz, Majida Kazmi, Pervez Akhtar, Nassar Ikram Caspian Journal of Applied Sciences Research - Vol.5(2), Pages 1-10
Resource Efficient Implementation of the Keccak, Skein & JH Algorithms on a Reconfigurable Platform January 01, 2016 Arshad Aziz, Dur-e-Shahwar Kundi, Kashif Latif Cankaya University Journal of Science and Engineering - Volume 13, No. 1, Pages 40-57
Implementation of T-box/T-1-Box Based AES Design on Latest Xilinx FPGA October 01, 2015 Arshad Aziz, Dur-e-Shahwar Kundi Mehran University Research Journal of Engineering and Technology - Volume 35 , Issue 4, Pages 441-446
A Robust Wavelet Based Digital Image Watermarking Technique Using FPGA August 01, 2015 Arshad Aziz, Zareen Tabassum, Majida Kazmi, Saad Ahmed Qazi Mehran University Research Journal of Engineering and Technology - Volume 34, Issue S1, Pages 139-148
Area Efficient S-Box Approach for SubByte Transformation in AES August 01, 2015 Arshad Aziz, Dur-e-Shawar Kundi, Saleha Zaka Mehran University Research Journal of Engineering and Technology - Volume 34, Issue S1, Pages 63-68
Logically Grouped Reduced-set Implementation of SHA3-256 on FPGA August 01, 2015 Arshad Aziz, Dur-e-Shahwar Kundi Mehran University Research Journal of Engineering and Technology - Volume 34, Issue S1, Pages 13-20
An efficient single unit T-box/T-1-box implementation for 128-bit AES on FPGA June 01, 2015 Dur e Shahwar, Arshad Aziz, Majida Kazmi Security and Communication Networks - Volume 8, Issue 9, Pages 1725-1731
FPGA Based Compact and Efficient Full Image Buffering for Neighborhood Operations February 28, 2015 Majida Kazmi, Arshad Aziz, Pervez Akhter, Dur e Shahwar Advances in Electrical and Computer Engineering - Volume 15, Issue 1, Pages 95-104
FPGA Implementation of Advance Encryption Standard Using Xilinx System Generator April 01, 2014 Arshad Aziz, Alia Arshad, Kanwal Aslam, Dur-e-Shahwar Kundi Asian Journal of Applied Sciences - Volume 02, Issue 02, Pages 190-198
Comparison between FPGA Logic Resources and Embedded Resources Used By Discrete Arithmetic (DA) Architecture to Design FIR Filter April 01, 2014 Arshad Aziz, Irfan Ahmed Usmani, Muzaffar Rao, Razia Zia International Journal of Scientific Engineering and Technology - Volume No.3 Issue No.4, Pages 440-443
Area Efficient Implementation of MTI Processing Module on a Reconfigurable Platform January 12, 2014 Arshad Aziz, Munaza Yousuf, Riaz Mahmud Chinese Journal of Engineering - Volume 2014, Article ID 167184, 7 pages
Reduced Precision Redundancy for Satellite Telecommand Receiver Module on FPGA September 24, 2013 Arshad Aziz, Salman Sadruddin Chinese Journal of Engineering - Volume 2013 , Article ID 453872, 8 pages
Xilinx System Generator® Based Implementation of a Novel Method of Extraction of Nonstationary Sinusoids August 01, 2013 Arshad Aziz, Muhammad Abubakar, Pervez Akhtar Journal of Signal and Information Processing - Volume 4, No. 3B, Pages 7-13
Efficient Hardware Implementation of SHA-3 Candidate Grostl using FPGA October 01, 2012 Arshad Aziz, Syed Muhammad Adnan International Journal of Computer Applications - Volume 55, No.15, Pages 6-11
Look-Up Table Based Implementations of SHA-3 Finalists: JH, Keccak and Skein September 26, 2012 Kashif Latif, Arshad Aziz, Athar Mahboob KSII Transactions on Internet and Information Systems - Vol. 6, No.9
Hardware Performance Evaluation of SHA-3 Finalists - Blake, Keccak and Skein March 14, 2012 Kashif Latif, Arshad Aziz, Athar Mahboob Arab Gulf Journal of Scientific Research - Volume 30, Issue 1, Pages 14-22
High Throughput Hardware Implementation of Secure Hash Algorithm Skein-256 November 30, 2011 Arshad Aziz, Kashif Latif, Muhammad Tariq, Athar Mahboob International Journal of Academic Research - Vol. 3, No. 6, Part I, Pages 200-206
Efficient Software Implementation of Secure Hash Algorithm (Sha-3) Candidate-Skein November 30, 2011 Arshad Aziz, Kashif Latif, Muhammad Tariq, Athar Mahboob International Journal of Academic Research - Vol. 3. No. 6, Part II
Optimal utilization of available reconfigurable hardware resources November 10, 2011 Kashif Latif, Arshad Aziz, Athar Mahboob Computers & Electrical Engineering - Volume 37, Issue 6, Pages 1043-1057
Some Aspects of Deposition Parameters of RF Sputtered Ferromagnetic Film Germane to the Study of Magnetoresistive Sensing Devices September 01, 2011 Arshad Aziz, Pervez Akhtar, Tariq Javid Ali Advanced Materials Research - Vol. 264-265, Pages 160-165
Resource efficient implementation of T-Boxes in AES on Virtex-5 FPGA April 30, 2010 Dur e Shahwar, Arshad Aziz, Nasar Ikram Information Processing Letters - Volume 110, Issue 10, Pages 373-377
An FPGA Based AES-CCM Crypto Core for IEEE 802. 11i Architecture September 01, 2007 Arshad Aziz, Nassar Ikram International Journal of Network Security (IJNS) - Vol.5, No.2, Pages 224-232
Memory efficient implementation of AES S-BOXES on FPGA August 01, 2007 Arshad Aziz, Nassar Ikram Journal of Circuit Systems and Computers (JCSC), ISSN: 0218-1266, - Volume 16, Issue 4, Pages 603-611
Conferences
Non Sub-sampled Contourlet Transform based Feature Extraction technique for Differentiating Glioma Grades using MRI Images August 19, 2017 - August 20, 2017 Arshad Aziz, Razia Zia, Pervez Akhtar, Maroof Ali Shah, Dur-e-Shahwar Kundi 30th Australasian Joint Conference on Artificial Intelligence - Australia
A FPGA Based Two Level Optimized Local Filter Design for High Speed Image Processing Applications December 12, 2016 - December 13, 2016 Arshad Aziz, Majida Kazmi, Pervez Akhtar, Nassar Ikram International Conference on Advances in Information and Communication Technology - Vietnam
FPGA based efficient architecture for image watermarking using Wavelet Co-efficients Quantization December 18, 2014 - December 20, 2014 Arshad Aziz, Jamal Ahmed, Pervez Akhtar International Conference on Open Source Systems and Technologies (iCOSST) - Pakistan
Compact Implementation of SHA3-512 on FPGA June 12, 2014 - June 13, 2014 Arshad Aziz, Alia Arshad, Dur-e-Shahwar Kundi IEEE Conference on Information Assurance and Cyber Security (CIACS) - Pakistan
Compact hardware implementation of SHA-3 finalist blake on FPGA December 09, 2013 - December 10, 2013 Arshad Aziz, Muhammad Arsalan, Muhammad Ata-ur-Rehman, Nasir Mehmood IEEE 9th International Conference on Emerging Technologies - Pakistan
Simulation design of an efficient MTI processing module for embedded platform June 15, 2013 - June 20, 2013 Arshad Aziz, Munaza Yousuf, Riaz Mahmud 2nd Mediterranean Conference on Embedded Computing (MECO) - Mexico
Software implementation of Standard Hash Algorithm (SHA-3) Keccak on Intel core-i5 and Cavium Networks Octeon Plus embedded platform June 15, 2013 - June 20, 2013 Arshad Aziz, Aisha Malik, Dur- e-Shahwar Kundi, Moiz Akhter 2nd Mediterranean Conference on Embedded Computing (MECO) - Mexico
Implementation of SHA-3 Candidate Skein on Two Unexplored Multiprocessor Platforms May 18, 2013 - May 19, 2013 Arshad Aziz, Aisha Malik, Abdul Qadeer International Conference on Sensor Network Security Technology and Privacy Communication System - China
Low-cost Machine Vision System for dimension measurement of fast moving conveyor products December 20, 2012 - December 22, 2012 Arshad Aziz, Muhammad Arsalan International Conference on Open Source Systems and Technologies - Pakistan
Resource efficient and area optimized Grstl implementation on FPGA December 20, 2012 - December 22, 2012 Arshad Aziz, Syed Muhammad Adnan International Conference on Open Source Systems and Technologies - Pakistan
Comparative Analysis of High Speed and Low Area Architectures of Blake SHA-3 Candidate on FPGA December 17, 2012 - December 19, 2012 Arshad Aziz, Muhammad Arsalan 10th International Conference on Frontiers of Information Technology (FIT) - Pakistan
Medical image denoising based on adaptive thresholding in contourlet domain October 16, 2012 - October 18, 2012 Arshad Aziz, Majida Kazmi, Pervez Akhtar, Aliza Maftun, Wasay Bin Afaq 5th International Conference on BioMedical Engineering and Informatics (BMEI 2012) - China
Compact Implementation of Skein-256 Hash Function on FPGA May 27, 2012 - May 30, 2012 Arshad Aziz, Dur-e-Shahwar Kundi Spring Congress on Engineering and Technology - China
Efficient Hardware Implementations and hardware performance Evaluation of SHA-3 Finalists March 22, 2012 - March 23, 2012 Arshad Aziz, Kashif Latif, M Muzaffar Rao, Athar Mahboob 3rd SHA3 Candidate Conference - United States
High Throughput Hardware Implementation of Secure Hash Algorithm (SHA-3) Finalist: BLAKE December 19, 2011 - December 21, 2011 Arshad Aziz, Kashif Latif, Athar Mahboob IEEE 9th International Conference on Frontier in Information Technology - Pakistan
FPGA Based Higher Quality Video Acquisition System March 16, 2011 - March 17, 2011 Arshad Aziz, Jamal Ahmed, Muhammad Faisal 26th IEEEP Annual Multi-topic International Symposium (SIMTS-2011) - Pakistan
MATLAB Simulation of a Variable Speed Controller for a Three Phase Induction Motor March 03, 2011 - March 03, 2011 Arshad Aziz, Shezana Zulfiqar Ali, Azka Khalil, Sumayyah Waheed 26th IEEEP Students’ Seminar - Pakistan
A Unified Approach to Secure and Robust Hashing Scheme for Image and Video Authentication October 16, 2010 - October 18, 2010 Arshad Aziz, Nighat Jamil 3rd International Conference on Image and Signal Processing - China
Efficient resource utilization of FPGAs December 16, 2009 - December 18, 2009 Arshad Aziz, Kashif Latif, Athar Mahboob 6th International Conference on Frontiers of Information Technology - Pakistan
A Framework for Secure Access to Medical Images July 13, 2009 - July 16, 2009 Arshad Aziz, Tariq Javid Ali, Pervez Akhtar International Conference on Bioinformatics, Computational Biology, Genomics and Chemoinformatics - United States
A Compact AES Encryption Core on Xilinx FPGA February 17, 2008 - February 18, 2008 Arshad Aziz, Dur-e-Shahwar Kund, Saleha Zaka, Qurat-Ul-Ain 2nd IEEE International Conference on Computer, Control and Communication - Pakistan
An Efficient Software Implementation of AES-CCM for IEEE 802.11i Wireless Standard July 24, 2007 - July 27, 2007 Arshad Aziz, Abdul Samiah, Nassar Ikram 2nd IEEE International Workshop on Security Trust, and Privacy for Software Applications (STPSA 2007) - China
An efficient FPGA based sequential implementation of advanced encryption standard December 05, 2005 - December 06, 2005 Arshad Aziz, Nassar Ikram 3rd International Conference on Information and Communications Technology - Egypt
Teaching Experience:
Assiatant Professor National University of Sciences and Technology NUST-PNEC December 01, 2007 - January 21, 2011
Lecturer National University of Sciences and Technology NUST-PNEC January 02, 2003 - November 30, 2007
Demonstrator National University of Sciences and Technology April 24, 2000 - January 01, 2003
Professional Experience:
Systems Manager Pakistan Navy Engineering College February 13, 1998 - April 23, 2000